Signal discrimination is used in electronic systems to discriminate between signals of different amplitudes, such as in processing of signals from radiation sensors. FIG. 1 shows a block diagram of a typical electronic system 100 for radiation detectors, where a charge signal from a sensor 101 is first amplified with a low-noise charge amplifier 102, then filtered by a filter 103 resulting in a pulse. The pulse goes through a discrimination stage at a discriminator 110 and, if it exceeds a pre-determined threshold, it is processed to measure quantities of interest like, for example, the peak amplitude and/or the timing of the pulse at a processing stage 106.
Electronic systems like the one in FIG. 1 are affected by noise, which results in noise pulses at the output of the filter 103. The purpose of the discriminator is, in most cases, to discriminate between the pulses of interest and the noise pulses. This is achieved by comparing the pulse amplitude with the pre-determined threshold. If the threshold is exceeded, the pulse is processed by the processing stage 106, otherwise the pulse is ignored. Without discrimination, the processing stage 106 would be constantly engaged by the noise pulses, thus introducing a prohibitively long dead time (i.e., time during which the system is unable to process other pulses), which depends on the duration of the processing. Additionally, the electronic systems would generate a large amount of measurements on the noise pulses of no interest to users.
The discriminator 110 is typically composed of a comparator circuit 104 and a logic circuit 105. As previously said, the comparator circuit 104 compares the amplitude of a pulse to a pre-determined threshold and, if the threshold is exceeded, the comparator circuit 104 generates a logic signal. The logic signal is used by the logic circuit 105 to enable the processing of the pulse.
FIG. 2 illustrates a comparator circuit which compares signals at the positive input Vi+, for example, the pulse generated in FIG. 1, with signals, for example, a threshold, at the negative input Vi−. The circuit includes a current source Ibias, a differential input stage Mi+ and Mi−, two diode-connected transistors Md+ and Md− providing two outputs Vo− and Vo+ that will be converted into an actual logic signal by a next stage not shown in FIG. 2, and two cross-connected transistors Mh+ and Mh−. Comparator circuits are frequently required to provide a fast response independent of the amplitude of a pulse, meaning that the response of a comparator must be comparably fast when a threshold is exceeded by either a large amount (i.e., large pulses) or a small amount (i.e., small pulses). The fast response could be achieved by introducing a positive feedback in the circuit through the two cross-connected transistors Mh+ and Mh−, which are also known as hysteresis transistors.
The hysteresis transistors also introduce two different effective thresholds: an upper threshold, effective when the signal crosses the threshold with a positive slope; and a lower threshold, effective when the signal crosses the threshold with a negative slope. In the case of pulses, the comparator triggers on the upper threshold on the rising edge of a pulse, and it triggers back on the lower threshold on the falling edge of the pulse.
The hysteresis concept is illustrated in FIG. 3. The nominal threshold, i.e., the threshold voltage applied to one input of the comparator, typically, but not necessarily, sits about in the center on the hysteresis window, i.e. ΔVh+≈ΔVh−, and the total hysteresis ΔVh is given by ΔVh++ΔVh−.
An example of response of the comparator circuit in FIG. 2 to a large pulse is illustrated in FIG. 4. FIG. 4 illustrates the input pulse at Vi− and the output (Vo+−Vo−) of the comparator. It must be observed that once the comparator triggers on the positive slope of an input pulse, it is required that the comparator triggers back to the original state. Otherwise, it would not be able to discriminate the next pulse. Triggering back of the comparator to its original state can be achieved by using the falling edge of the pulse, which must cross the lower threshold as shown in FIG. 4.
However, hysteresis may introduce a limit on the minimum pulse amplitude that can be discriminated. As discussed above, the lower threshold cannot be set lower than the baseline of the pulses to be discriminated for the comparator to trigger back. Thus, the minimum pulse amplitude that can be discriminated may not be lower than the hysteresis window, i.e. ΔVh, as shown in FIG. 5. In FIG. 5, the comparator does not respond to pulses with amplitudes lower than the hysteresis window.
Attempts to reduce the value of the minimum amplitude that the comparator can discriminate may be found in a number of U.S. patents.
In U.S. Pat. No. 4,940,907, which is incorporated by reference in its entirety as if fully set forth in this specification, D. P. Laude discloses a system with adjustable hysteresis, where the hysteresis is small for low amplitude signals and increases for large amplitude signals. However, the small hysteresis of the comparator for small signals results in a limited speed of the comparator for small signals.
In U.S. Pat. No. 5,155,386, which is incorporated by reference in its entirety as if fully set forth in this specification, D. P. Laude discloses a system where the amount of hysteresis is programmable by users. However, the same limitations as discussed previously with respect to the U.S. Pat. No. 4,940,907 apply.
In U.S. Pat. No. 5,166,550, which is incorporated by reference in its entirety as if fully set forth in this specification, K. Matsubara et al. disclose a system where the threshold voltage, i.e., the reference voltage, is variable and a voltage is added to the signal in an amount proportional to the variable voltage. This system responds as having a variable hysteresis. However, if used with small signals, the small hysteresis of the comparator for small signals results in low speed, as in the disclosure of D. P. Laude. Furthermore, the threshold, in order to be variable, cannot be filtered, thus adding noise through the threshold input during the discrimination process. Further yet, the variable voltage added to the signal also adds noise to the signal being discriminated.
In U.S. Pat. No. 6,208,187, which is incorporated by reference in its entirety as if fully set forth in this specification, M. J. Callahan Jr. discloses a system where the hysteresis is adjusted in accordance with output signals. The hysteresis is obtained using a differential pair similar to Mi+ and Mi− in FIG. 2 and by adding a certain amount of offset at the source or drain of one of the two transistors. The offset is controlled by introducing one or more resistors in the circuit and by enabling or disabling the resistor(s) depending on the state of the output (as described in FIGS. 3, 5, and 7 of U.S. Pat. No. 6,208,187). This results in a hysteresis where the lower and upper thresholds change depending on the state of the output. U.S. Pat. No. 6,208,187 also discloses an alternative circuit where the hysteresis is controlled by adding transistors either in parallel to the differential pair (as shown in FIG. 10 of U.S. Pat. No. 6,208,187) or at the drains of the differential pair (as shown in FIG. 11 of U.S. Pat. No. 6,208,187). However, the circuits proposed in U.S. Pat. No. 6,208,187 by M. J. Callahan Jr. lack positive feedback, which is critical to achieve a high speed discrimination. The loops present in the proposed circuits are only used to modify the hysteresis, and not to achieve a high speed in the comparator response.
In U.S. Pat. No. 6,362,467, which is incorporated by reference in its entirety as if fully set forth in this specification, D. Bray discloses a system where the speed of a comparator is increased by using a gain amplifier and a feedback from the output of the comparator to the input of the gain amplifier. However, the circuit in this system requires additional fast amplifiers, which implies additional power dissipation compared to a circuit using a single differential pair.
In U.S. Pat. No. 6,982,582, which is incorporated by reference in its entirety as if fully set forth in this specification, Yi Cheng discloses a system where a hysteresis comparator (e.g., the comparator 100 in FIGS. 1 and 400 in FIG. 4 in U.S. Pat. No. 6,982,582) is provided with an additional differential pair at the input (e.g., N3, N4 in FIG. 4 of U.S. Pat. No. 6,982,582) to control the position of the threshold, i.e. the position of the hysteresis window. The position of the hysteresis window can be adjusted using the circuit in FIG. 8 of U.S. Pat. No. 6,982,582. However, the window size would not be controllable since it is fixed in the hysteresis comparator, e.g., comparator 100 or 400, and it would require considerable amount of power in the input differential pair in order to rapidly switch the hysteresis window between the two positions since there is no positive feedback.
Therefore, as discussed above, none of the prior systems is able to provide signal discrimination that can discriminate signals with amplitudes lower than the hysteresis window with a high response speed and low power consumption.